By P. Chu
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5 μm2. 5 μm2. Such a cell was designed as a full custom design. The fourth metal layer is used for guarding transistors from light irradiation; the other three layers were used for wiring. 5-42 Vertical distance between photodiodes [μm] 12-21 Number of photodiodes 170,165 Number of logic blocks 1,508 Number of switching matrices 1,589 Number of I/O bits 272 Gate count 51,272 Table 1. Specifications of a high-density DORGA. 2 Optically reconfigurable logic block A block diagram of an optically reconfigurable logic block of the DORGA-VLSI chip is presented in Fig.
This circuit called regulated cascode which is abbreviated to RGC. The RGC uses M5 to achieve the gain boosting by increasing the output impedance without adding more cascode devices. VDS1 is calculated by follows: Assuming M5 is in saturation region in Fig. 2(b). It can be shown that IC = 1 β 5 (VGS 5 − VT )2 2 => VGS 5 = VDS 1 − VC = => VDS 1 = VC + 2 IC β5 2 IC β5 + VT 5 + VT 5 (9) ⎛ ⎞ 2 IC + VT 5 ⎟ . Thus, Gm can be tuned by using a controllable From (6) Gm = β 1VDS 1 = β 1 ⎜VC + ⎜ ⎟ β 5 ⎝ ⎠ voltage source VC or current source IC.
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